Power On Reset

The Sona IF573 and Sterling LWBx radios expose signals (WL_REG_ON and BT_REG_ON) that enable regulator circuitry internal to the chipset. The Wi-Fi and Bluetooth functionality respectively will be disabled if these signals are at a low state.

  • These signals are pulled low by default on the Sterling LWB/LWB5/LWB+ radios, so they must be driven high by the host platform in order for the radio to function.
  • These signals are pulled high by default on the Sterling LWB5+, so the Wi-Fi and Bluetooth radios will be enabled by default when power is applied.
  • The Sona IF573 pulls the WL_REG_ON and BT_REG_ON (W_DISABLE#/W_DISABLE2#) signals high on the M.2 2230 card and leaves them pulled low on the M.2 1318 solder down module. However, the BT_REG_ON (WL_DISABLE2#) signal MUST be controlled by host platform GPIO under software control.

Note: Ezurio recommends controlling the WL_REG_ON and BT_REG_ON (WL_DISABLE#/WL_DISABLE2#) signals using host GPIO in all cases. This guarantees that the module can be reset as needed to handle foreseen and unforeseen use cases. In addition, the Sona IF573 requires host GPIO control over the BT_REG_ON/WL_DISABLE2# signal. It is not possible to support Bluetooth on the Sona IF573 without it.

Note: There is requirement to delay an absolute minimum of 150 milliseconds after power supplies are stable AND the WL_REG_ON and/or BT_REG_ON signals are asserted before the host platform can perform the first access across the interface. This is due to an internal Power On Reset that is performed when these signals are asserted. We recommend waiting 250 milliseconds after signal assertion before allowing the first host access to ensure the internal reset sequence has completed.

Sona IF573 SDIO Power Supply Restrictions

The Sona IF573 SDIO interface operates at 1.8V only. The host platform SDIO interface must operate at 1.8V at all times, including during bus enumeration.

Sterling LWB5 and LWB5+ SDIO Power Supply Restrictions

The Sterling LWB5 and LWB5+ have an SDIO3.0 interface that can operate at 1.8V to support UHS-1 speed modes. The actual voltage that is used by the radio interface is the VDDIO power supply on the radio module. The host SDIO voltage level must match the VDDIO power supply on the Sterling LWB5/LWB5+ at all times for the interface to function properly.

It is possible for the host platform to dynamically move from 3.3V to 1.8V as the SDIO interface is enumerated and the radio capabilities are discovered. If the host platform does change voltage, that same dynamic voltage supply must be supplied to the VDDIO pins on the Sterling LWB5/LWB5+. If the VDDIO pins on the Sterling LWB5/LWB5+ are held at a fixed voltage, then the host platform is also required to stay at that same voltage.

This issue primarily occurs on Sterling LWB5/LWB5+ development kits where the VDDIO rail is configurable, but fixed to a specific level. If used with an SDIO3.0+ capable host via an SDIO slot, then it is likely the host interface will attempt to enumerate the radio at 3.3V and then switch to 1.8V as part of changing to a higher UHS-1 speed mode. If the VDDIO supply on the radio is fixed at 3.3V, then the host must be prevented from switching to 1.8V after enumeration. This is typically done by setting the “no-1-8-v” property in the SDIO controller device tree, and results in the controller staying in SDIO 2.0 compliant mode (Full Speed or High Speed support only).

Note: The VDDIO power supply on the Sterling LWB5+ SDIO/UART M.2 module is fixed at 1.8V. Therefore the host platform SDIO interface must operate at 1.8V at all times, including during bus enumeration.

If the VDDIO supply on the radio matches the VDDIO supply on the host, there are no additional software considerations related to bus voltage.

SDIO Slot Power Management

The brcmfmac driver will aggressively go to a low power mode during periods of inactivity. While in this low power state it will not respond to most SDIO bus accesses. This is normally not a problem because most SDIO bus accesses are initiated by the brcmfmac driver which will first bring the radio back out of the low power state. However, the SDIO host stack will also do a direct bus access using a SELECT command in cases where the host stack needs to determine if the device is still present. If that bus access occurs when the radio happens to be in a low power state the bus access will fail causing the SDIO host driver to determine there is no device present. This may result in the host stack attempting to power cycle the slot. This is most likely to occur at platform resume if the slot is configured to keep power in suspend.

The host stack will not attempt to query the slot in this way if the slot is marked as non-removable. If this is necessary it is done with the “non-removable” entry in the SDIO controller device tree node.